Package Design Engineer

Singapore-Yishunonsitemid

Posted yesterday · via Workday

About this role

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom is seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and RF/microwave communications A/D-D/A converters (ADC & DAC). You will be part of a worldwide R&D team developing high-performance package designs for ASICs used in artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations. These designs include SerDes at 112G and higher, RF/Microwave ADC/DAC, DDR and more.…

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What we'd score you on

reqspace match rubric

Five dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.

1

Skills match

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2

Level fit

This role is mid-level. We check your trajectory against it.

3

Domain experience

Your work in the role's domain matters more than your years total. We weight recent and direct experience.

4

Recency

A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.

5

Location fit

This role is based in Singapore-Yishun. We weight your proximity and willingness to relocate.

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Skills in this role

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