Post silicon validation engineer

USA-TX-Austin - River Place B7onsitemid$108K – $173K

Posted yesterday · via Workday

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About this role

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: We are seeking a Post-Silicon Validation Engineer to drive the bring-up, characterization, and debugging of our next-generation Ethernet and PCIe Retimer chips . This role heavily focuses on advanced Ethernet physical layer (PHY) validation, ensuring our silicon meets rigorous IEEE networking standards and high-speed interoperability requirements. Key Responsibilities Ethernet & PCIe Validation: Hands-on bring-up of multi-rate Retimer ICs.…

Read the full description on 4473 VMware, K.K.'s site →

What we'd score you on

reqspace match rubric

Five dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.

Skills match

For this role: python, c++

Level fit

This role is mid-level. We check your trajectory against it.

Domain experience

Your work in the role's domain matters more than your years total. We weight recent and direct experience.

Recency

A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.

Location fit

This role is based in USA-TX-Austin - River Place B7. We weight your proximity and willingness to relocate.

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Skills in this role

Pulled from the job description. These are the keywords we'll weight when scoring your fit.

pythonc++

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