R&D Engineer IC Design 5
USA-California-San Jose-1320 Ridder Park Driveonsitemid$144K – $230K
Posted today · via Workday
About this role
Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: This individual will be a key member of the ASIC system-level verification team. Responsibilities include developing complex verification environments, creating comprehensive test plans, and verifying high-performance network switch ASIC/FPGAs. The role involves hands-on implementation across every aspect of ASIC verification while collaborating closely with system architects, design engineers, and verification teams.…
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
We compare your skills against the role requirements.
2
Level fit
This role is mid-level. We check your trajectory against it.
3
Domain experience
Your work in the role's domain matters more than your years total. We weight recent and direct experience.
4
Recency
A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.
5
Location fit
This role is based in USA-California-San Jose-1320 Ridder Park Drive. We weight your proximity and willingness to relocate.
Score yourself on this role.
Free · no card · written explanation included
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