Staff DFT Engineer

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Strong knowledge and experience in Scan Insertion, Compression, ATPG, Memory BIST and JTAG at IC level for mixed signal designs Looking for Expert at IJTAG, SSN, ATPG Verification Experience in Mentor DfT tools, Synopsys DC and simulator tools. Define DfT Strategy and Requirement Specification for the design DfT verification for gate-level and timing simulations Work cross sites with design team to define and implement DfT. Hands on experience in solving DfT problems, simulation failures, ATPG coverage and DRC improvements.…