intern in AI System Verification
MEYLAN 01onsitejunior
Posted 1w ago · via Workday
About this role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. PCIe DIP integration with AVIPs and Hybrid virtual platform reference example to facilitate bring-up and debug Design for AI and AI for Design The PCIe protocol is widely used for high-performance connections between CPUs and high-throughput peripherals such as GPUs and AI accelerators. It is often described as “the backbone of AI hardware”. Many Cadence customers in the EMEA region use PCIe in their designs and need to verify and validate both the hardware and software integration of PCIe Design IP (DIP).…
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
For this role: glue
2
Level fit
This role is junior-level. We check your trajectory against it.
3
Domain experience
Your work in the role's domain matters more than your years total. We weight recent and direct experience.
4
Recency
A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.
5
Location fit
This role is based in MEYLAN 01. We weight your proximity and willingness to relocate.
Score yourself on this role.
Free · no card · written explanation included
Skills in this role
Pulled from the job description. These are the keywords we'll weight when scoring your fit.
glue