Principal Physical Design Engineer
Irvineonsiteprincipal$150K – $250K
via Greenhouse
About this role
Celero Communication Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure.
We are seeking an experienced Physical Design Engineer to lead the transformation of complex circuit designs into high-quality, manufacturable silicon. In this role, you will drive all aspects of the physical implementation flow, including floorplanning, power planning, place-and-route (P&R), clock tree synthesis, timing closure, and physical verification.…
Read the full description on Celerocommunicationsinc's site →
What we'd score you on
reqspace match rubricFive dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.
1
Skills match
For this role: python, r, teams
2
Level fit
This role is principal-level. We check your trajectory against it.
3
Domain experience
Your work in the role's domain matters more than your years total. We weight recent and direct experience.
4
Recency
A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.
5
Location fit
This role is based in Irvine. We weight your proximity and willingness to relocate.
Score yourself on this role.
Free · no card · written explanation included
Skills in this role
Pulled from the job description. These are the keywords we'll weight when scoring your fit.
pythonrteams
More at Celerocommunicationsinc
- View →Senior DSP Firmware EngineerOttawa, Canada
- View →ASIC Design Engineer – DSP / Analog / SerDesSan Jose, CA
- View →Principal PLL Design EngineerIrvine, CA and San Jose, CA
- View →Senior Technical RecruiterIrvine, CA
- View →Principal Analog Design EngineerIrvine, CA, and San Jose, CA
- View →Optical DSP Design EngineerOttawa, Ontario, Canada and Vancouver, British Columbia, Canada