ASIC Design Engineer Technical Lead

San Joseonsitesenior$184K$264K

Posted today · via Workday

About this role

The application window is expected to close on: 08/01/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the Team Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks. Cisco’s silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym, healthcare, and café, social interest groups, and philanthropy), with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact Participate in and contribute to chip architecture definition and discussions.…

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What we'd score you on

reqspace match rubric

Five dimensions, recruiter-grade. Upload your resume and we'll generate a written explanation of where you fit and where the gaps are.

1

Skills match

For this role: python, perl, shell, split

2

Level fit

This role is senior-level. We check your trajectory against it.

3

Domain experience

Your work in the role's domain matters more than your years total. We weight recent and direct experience.

4

Recency

A skill you used last quarter weighs more than one from five years ago. We grade on recency, not lifetime.

5

Location fit

This role is based in San Jose. We weight your proximity and willingness to relocate.

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Skills in this role

Pulled from the job description. These are the keywords we'll weight when scoring your fit.

pythonperlshellsplit

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