Senior Engineer Verification

Your Role Key responsibilities in your new role Take responsibility of developing SV RNM models and its verification against schematic. Developing automatic checkers Gain knowledge on AMS methodologies/Simulators Take responsibility of analog vectors (test parameters) verification at SoC level using DMS verification flow involving UVM testbench and RNM models. Knowledge on Scripting. Your Profile Qualifications and skills to help you succeed Mixed signal verification engineers responsible for AMS verification of Multi phase controllers, power switches. Development of SV RNM models for analog blocks like ADC, buck-boost controller, ldo etc. Verification of SV RNM models against schematic.…