Padring Verification Engineer

NVIDIA’s System-on-Chip (SOC) group is seeking a motivated Padring Verification Engineer to develop scalable verification methodologies and deliver high-quality padring verification results for complex GPU and Tegra SOCs. In this role, you will create verification methodologies, tools, and automation for padring RTL integration, connectivity verification, and chip assembly. You will also execute padring verification and padring connectivity signoff for GPU and Tegra projects, applying and continuously improving the methodologies you develop. The work includes verification of DFT-related padring logic, such as boundary scan and test-access connectivity. You will collaborate closely with RTL, DFT, Physical Design, CAD, Package Design, and Software teams.…